Nanotechnology Now - Press Release: University of Houston develops method for creating single-crystal arrays of graphene: New method marks advance in efforts to develop a replacement for silicon in high-performance electronics

Home > Press > University of Houston develops method for creating single-crystal arrays of graphene: New method marks advance in efforts to develop a replacement for silicon in high-performance electronics

Abstract:
University of Houston researchers have developed a method for creating single-crystal arrays of the material graphene, an advance that opens the possibility of a replacement for silicon in high-performance computers and electronics. The work by UH researchers and their collaborators is featured on the cover of the June issue of Nature Materials.

University of Houston develops method for creating single-crystal arrays of graphene: New method marks advance in efforts to develop a replacement for silicon in high-performance electronics

Houston, TX | Posted on June 2nd, 2011

Graphene is a one-atom-thick layer of carbon that was first fabricated in 2004. Single-crystal arrays of the material could be used to create a new class of high-speed transistors and integrated circuits that use less energy than silicon electronics because graphene conducts electricity with little resistance or heat generation.

But the industry needs a reliable and defect-free method for manufacturing large quantities of single crystals of graphene. The development reported in Nature Materials marks a step towards perfecting such a method.

"Using these seeds, we can grow an ordered array of thousands or millions of single crystals of graphene," said Qingkai Yu, the paper's first author. Yu developed the single-crystal growth process at the UH Center for Advanced Materials (CAM), where he was a research assistant professor of electrical and computer engineering.

"We hope the industry will look at these findings and consider the ordered arrays as a possible means of fabricating electronic devices," said Yu, who is now an assistant professor at Texas State University in San Marcos and remains a project leader at CAM.

Yu and Steven Pei, UH professor of electrical and computer engineering and CAM's deputy director, invented the graphene seeded-growth technique that UH patented in 2010.

"There is still a long way to go. However, this development makes the fabrication of integrated circuits with graphene transistors possible. This may actually be the first viable integrated circuit technology based on nano-electronics," Pei said.

Yong P. Chen, an assistant professor of nanoscience and physics at Purdue University, was the paper's co-corresponding author.

At CAM, single-crystal graphene arrays were grown on top of a copper foil inside a chamber containing methane gas using a process called chemical vapor deposition. This process was pioneered by Yu at CAM in 2008 and is now widely accepted as the standard method to create large-area graphene films for potential applications in touch-screen displays, e-books and solar cells.

"Graphene isn't there yet, in terms of high quality mass production like silicon, but this is a very important step in that direction," said Chen, who led the graphene characterization efforts at Purdue.

In addition to Yu and Pei, UH graduate students Wei Wu and Zhihua Su, postdoctoral researchers Zhihong Liu and Peng Peng and assistant professor Jiming Bao along with Chen and nine other researchers from Purdue University, Brookhaven National Laboratory, Argonne National Laboratories and Carl Zeiss SMT Inc. co-authored the paper.

Last year, two scientists received the Nobel Prize in physics for discovering graphene. At that time, Yu was working at CAM to develop ways to produce mass quantities of high-quality graphene.

The findings reported in Nature Materials demonstrated that researchers could control the growth of the ordered arrays. The researchers also were the first to demonstrate the electronic properties of individual grain boundaries.

The research was supported through a variety of funding sources, including the National Science Foundation, the U.S. Department of Energy, the Department of Homeland Security, the Defense Threat Reduction Agency, IBM Inc., the Welch Foundation, the Miller Family Endowment and Midwest Institute for Nanoelectronics Discovery.