Home > News > TSMC takes wraps off 65-nm plans
April 29th, 2003
TSMC takes wraps off 65-nm plans
Abstract:
Taiwan Semiconductor Manufacturing Co. Ltd. last week presented the first details of its 65-nanometer process technology for next-generation designs starting in late 2004. TSMC also became the latest chip maker to endorse strained-silicon technology for IC production at both the 90-nm and 65-nm nodes.
Source:
EETimes
Bookmark:
| Related News Press |
Chip Technology
Lab to industry: InSe wafer-scale breakthrough for future electronics August 8th, 2025
A 1960s idea inspires NBI researchers to study hitherto inaccessible quantum states June 6th, 2025
Programmable electron-induced color router array May 14th, 2025
 |
||
 |
||
| The latest news from around the world, FREE | ||
 |
||
|
|
||
| Premium Products | ||
 |
||
|
Only the news you want to read!
Learn More |
||
 |
||
|
Full-service, expert consulting
Learn More |
||
|
|
||